Nvidia Fermi GPU architecture revealed at Technology conference

At GPU Technology Conference in San Francisco, Nvidia revealed the first information about their next-generation GPU architecture, code-named “Fermi,” that has a number of computing features never before seen in a GPU. Here's how Nvidia represents the Fermi architecture when focused on GPU computing, with graphics-specific bits largely omitted. The 16 tall blues’re SMs (streaming multiprocessors). Small, green squares inside of each SM called […]

At GPU Technology Conference in San Francisco, Nvidia revealed the first information about their next-generation GPU architecture, code-named “Fermi,” that has a number of computing features never before seen in a GPU. Here's how Nvidia represents the Fermi architecture when focused on GPU computing, with graphics-specific bits largely omitted. The 16 tall blues’re SMs (streaming multiprocessors). Small, green squares inside of each SM called "CUDA cores." These’re the most fundamental execution resources on chip. Nonetheless, those execution resources do help determine the chip's total power; the GT200 had 240 of them, and Fermi has 512, just more than twice as many. Six darker blue blocks’re memory interfaces, per their labels. Those’re 64-bit interfaces, which means Fermi has a total path to memory that’s 384 bits wide. That's down from 512 bits on the GT200, but Fermi more than makes up for it by delivering nearly twice the bandwidth per pin via support for GDDR5 memory.

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