Intel releases more details of Tolapai an SoC embedded processor

At Hot Chips this past week, Intel released more technical details on its coming system-on-a-chip (SoC) processor called Tolapai. Tolapai is Intel's first attempt at an SoC design since its ill-fated "Timna" project a few years back, and when it's launched, it will be their first x86 processor with an on-die memory controller since the […]

At Hot Chips this past week, Intel released more technical details on its coming system-on-a-chip (SoC) processor called Tolapai. Tolapai is Intel's first attempt at an SoC design since its ill-fated "Timna" project a few years back, and when it's launched, it will be their first x86 processor with an on-die memory controller since the 80386EX in 1994. Tolapai is significant because it will be the x86 ISA's next major step into the embedded space, a space currently owned by the PowerPC, ARM, and MIPS ISAs.

First, let's look at the basics of the new processor:

  • 600MHz, 1 GHz, and 1.2GHz at launch
  • 148 million transistors
  • 37.5mm x 37.5mm package
  • 13-20W TDP
  • 65nm process
As we've reported previously, Tolapai will feature a Pentium M-derived processor core. Because the core is a variant of the Pentium M design, it's 32-bit only, but as an embedded part, it doesn't have a real need for 64-bit support.

Ars Technica

Intel, Processors, CPUs, Deskyop, Servers, Tolapai, SoC, Intel News